Self-repairing adder using fault localization

Keywords: Self-checking adder Carry-select adder Fault localization Self-repairing adder Multiple faults a b s t r a c t In this paper we propose an area-efficient self-repairing adder that can repair multiple faults and identify the particular faulty full adder. Fault detection and recovery has been carried out using self-checking full adders that can diagnose the fault based on internal functionality, independent of a fault propagated through carry. The idea was motivated by the common design problem of fault propagation due to carry in various approaches by self-checking adders. Such a fault can create problems in detecting the particular faulty full adder, and we need to replace the entire adder when an error is detected. We apply our self-checking full adder to a carry-select adder (CSeA) and show that the resulting self-checking CSeA consumes 15% less area compared to the previously proposed self-checking CSeA approach without fault localization. After observing fault localization with reduced area overhead, we utilize the self-checking full adder in constructing a self-repairing adder. It has been observed that our proposed self-repairing 16-bit adder can handle up to four faults effectively, with an 80% probability of error recovery compared to triple modular redundancy, which can handle only a single fault at a time. Advanced microelectronic technologies have allowed current digital systems to become more vulnerable to faults. It has been observed that the problem of single-event upset in digital systems has become more prominent with the increasing complexity of system on a chip, along with decreasing clock cycles to obtain high operating frequency [1,2]. The design of a compact circuit on a chip is advantageous in terms of noise but creates various problems in terms of reliability [3,4]. Researchers agree that reduction in hardware size will increase hardware failures in future processors [5]. Thermal cycling, dielectric behavior and biasing of digital integrated circuits have also caused many transient and permanent faults [6]. In order to deal with the above-mentioned problems, the concepts of self-checking and fault tolerance have been introduced. A system will be fault secure if it remains unaffected by a fault or if it indicates a fault as soon as it occurs [7]. A system will be self-testing if it produces a non-coded output in response to every generated fault [8]. A system will be totally self-checking (TSC) if it is both fault secure and self-testing [7]. The concept of TSC is used in different …